Thin n-in-p planar pixel sensors and active edge sensors for the ATLAS upgrade at HL-LHC

Silicon pixel modules employing n-in-p planar sensors with an active thickness of 200 $\mu$m, produced at CiS, and 100-200 $\mu$m thin active/slim edge sensor devices, produced at VTT in Finland have been interconnected to ATLAS FE-I3 and FE-I4 read-out chips. The thin sensors are designed for high energy physics collider experiments to ensure radiation hardness at high fluences. Moreover, the active edge technology of the VTT production maximizes the sensitive region of the assembly, allowing for a reduced overlap of the modules in the pixel layer close to the beam pipe. The CiS production includes also four chip sensors according to the module geometry planned for the outer layers of the upgraded ATLAS pixel detector to be operated at the HL-LHC. The modules have been characterized using radioactive sources in the laboratory and with high precision measurements at beam tests to investigate the hit efficiency and charge collection properties at different bias voltages and particle incidence angles. The performance of the different sensor thicknesses and edge designs are compared before and after irradiation up to a fluence of $1.4\times10^{16}n_{eq}/cm^{2}$.Comment: In proceedings of the 10th International Conference on Position Sensitive Detectors, PSD10 201

Investigation of thin n-in-p planar pixel modules for the ATLAS upgrade

In view of the High Luminosity upgrade of the Large Hadron Collider (HL-LHC), planned to start around 2023-2025, the ATLAS experiment will undergo a replacement of the Inner Detector. A higher luminosity will imply higher irradiation levels and hence will demand more ra- diation hardness especially in the inner layers of the pixel system. The n-in-p silicon technology is a promising candidate to instrument this region, also thanks to its cost-effectiveness because it only requires a single sided processing in contrast to the n-in-n pixel technology presently employed in the LHC experiments. In addition, thin sensors were found to ensure radiation hardness at high fluences. An overview is given of recent results obtained with not irradiated and irradiated n-in-p planar pixel modules. The focus will be on n-in-p planar pixel sensors with an active thickness of 100 and 150 um recently produced at ADVACAM. To maximize the active area of the sensors, slim and active edges are implemented. The performance of these modules is investigated at beam tests and the results on edge efficiency will be shown

Heavily Irradiated N-in-p Thin Planar Pixel Sensors with and without Active Edges

We present the results of the characterization of silicon pixel modules employing n-in-p planar sensors with an active thickness of 150 $\mathrm{\mu}$m, produced at MPP/HLL, and 100-200 $\mathrm{\mu}$m thin active edge sensor devices, produced at VTT in Finland. These thin sensors are designed as candidates for the ATLAS pixel detector upgrade to be operated at the HL-LHC, as they ensure radiation hardness at high fluences. They are interconnected to the ATLAS FE-I3 and FE-I4 read-out chips. Moreover, the n-in-p technology only requires a single side processing and thereby it is a cost-effective alternative to the n-in-n pixel technology presently employed in the LHC experiments. High precision beam test measurements of the hit efficiency have been performed on these devices both at the CERN SpS and at DESY, Hamburg. We studied the behavior of these sensors at different bias voltages and different beam incident angles up to the maximum one expected for the new Insertable B-Layer of ATLAS and for HL-LHC detectors. Results obtained with 150 $\mathrm{\mu}$m thin sensors, assembled with the new ATLAS FE-I4 chip and irradiated up to a fluence of 4$\times$10$^{15}\mathrm{n}_{\mathrm{eq}}/\mathrm{cm}^2$, show that they are excellent candidates for larger radii of the silicon pixel tracker in the upgrade of the ATLAS detector at HL-LHC. In addition, the active edge technology of the VTT devices maximizes the active area of the sensor and reduces the material budget to suit the requirements for the innermost layers. The edge pixel performance of VTT modules has been investigated at beam test experiments and the analysis after irradiation up to a fluence of 5$\times$10$^{15}\mathrm{n}_{\mathrm{eq}}/\mathrm{cm}^2$ has been performed using radioactive sources in the laboratory.Comment: Proceedings for iWoRiD 2013 conference, submitted to JINS

Performance of novel silicon n-in-p planar Pixel Sensors

The performance of novel n-in-p planar pixel detectors, designed for future upgrades of the ATLAS Pixel system is presented. The n-in-p silicon sensors technology is a promising candidate for the pixel upgrade thanks to its radiation hardness and cost effectiveness, that allow for enlarging the area instrumented with pixel detectors. The n-in-p modules presented here are composed of pixel sensors produced by CiS connected by bump-bonding to the ATLAS readout chip FE-I3. The characterization of these devices has been performed before and after irradiation up to a fluence of 5 x 10**15 1 MeV neq cm-2 . Charge collection measurements carried out with radioactive sources have proven the functioning of this technology up to these particle fluences. First results from beam test data with a 120 GeV/c pion beam at the CERN-SPS are also discussed, demonstrating a high tracking efficiency of (98.6 \pm 0.3)% and a high collected charge of about 10 ke for a device irradiated at the maximum fluence and biased at 1 kV.Comment: Preprint submitted to Nuclear Instruments and Methods A. 7 pages, 13 figure

Thin n-in-p pixel sensors and the SLID-ICV vertical integration technology for the ATLAS upgrade at the HL-LHC

The R&D activity presented is focused on the development of new modules for the upgrade of the ATLAS pixel system at the High Luminosity LHC (HL-LHC). The performance after irradiation of n-in-p pixel sensors of different active thicknesses is studied, together with an investigation of a novel interconnection technique offered by the Fraunhofer Institute EMFT in Munich, the Solid-Liquid-InterDiffusion (SLID), which is an alternative to the standard solder bump-bonding. The pixel modules are based on thin n-in-p sensors, with an active thickness of 75 um or 150 um, produced at the MPI Semiconductor Laboratory (MPI HLL) and on 100 um thick sensors with active edges, fabricated at VTT, Finland. Hit efficiencies are derived from beam test data for thin devices irradiated up to a fluence of 4e15 neq/cm^2. For the active edge devices, the charge collection properties of the edge pixels before irradiation is discussed in detail, with respect to the inner ones, using measurements with radioactive sources. Beyond the active edge sensors, an additional ingredient needed to design four side buttable modules is the possibility of moving the wire bonding area from the chip surface facing the sensor to the backside, avoiding the implementation of the cantilever extruding beyond the sensor area. The feasibility of this process is under investigation with the FE-I3 SLID modules, where Inter Chip Vias are etched, employing an EMFT technology, with a cross section of 3 um x 10 um, at the positions of the original wire bonding pads.Comment: Proceedings for Pixel 2012 Conference, submitted to NIM A, 6 page

Production and Characterisation of SLID Interconnected n-in-p Pixel Modules with 75 Micrometer Thin Silicon Sensors

The performance of pixel modules built from 75 micrometer thin silicon sensors and ATLAS read-out chips employing the Solid Liquid InterDiffusion (SLID) interconnection technology is presented. This technology, developed by the Fraunhofer EMFT, is a possible alternative to the standard bump-bonding. It allows for stacking of different interconnected chip and sensor layers without destroying the already formed bonds. In combination with Inter-Chip-Vias (ICVs) this paves the way for vertical integration. Both technologies are combined in a pixel module concept which is the basis for the modules discussed in this paper. Mechanical and electrical parameters of pixel modules employing both SLID interconnections and sensors of 75 micrometer thickness are covered. The mechanical features discussed include the interconnection efficiency, alignment precision and mechanical strength. The electrical properties comprise the leakage currents, tuning characteristics, charge collection, cluster sizes and hit efficiencies. Targeting at a usage at the high luminosity upgrade of the LHC accelerator called HL-LHC, the results were obtained before and after irradiation up to fluences of $10^{16}$ $\mathrm{n}_{\mathrm{eq}}/\mathrm{cm}^2$ (1 MeV neutrons).Comment: 16 pages, 22 figure

Novel Silicon n-in-p Pixel Sensors for the future ATLAS Upgrades

In view of the LHC upgrade phases towards HL-LHC the ATLAS experiment plans to upgrade the Inner Detector with an all silicon system. The n-in-p silicon technology is a promising candidate for the pixel upgrade thanks to its radiation hardness and cost effectiveness, that allow for enlarging the area instrumented with pixel detectors. We present the characterization and performance of novel n-in-p planar pixel sensors produced by CiS (Germany) connected by bump bonding to the ATLAS readout chip FE-I3. These results are obtained before and after irradiation up to a fluence of 10^16 1-MeV n_eq/cm^2, and prove the operability of this kind of sensors in the harsh radiation environment foreseen for the pixel system at HL-LHC. We also present an overview of the new pixel production, which is on-going at CiS for sensors compatible with the new ATLAS readout chip FE-I4.Comment: Preprint submitted to NIM-A Proceedings (Elba 2012

Characterization of Thin Pixel Sensor Modules Interconnected with SLID Technology Irradiated to a Fluence of 2⋅1015\cdot 10^{15}\,neq_{\mathrm{eq}}/cm2^2

A new module concept for future ATLAS pixel detector upgrades is presented, where thin n-in-p silicon sensors are connected to the front-end chip exploiting the novel Solid Liquid Interdiffusion technique (SLID) and the signals are read out via Inter Chip Vias (ICV) etched through the front-end. This should serve as a proof of principle for future four-side buttable pixel assemblies for the ATLAS upgrades, without the cantilever presently needed in the chip for the wire bonding. The SLID interconnection, developed by the Fraunhofer EMFT, is a possible alternative to the standard bump-bonding. It is characterized by a very thin eutectic Cu-Sn alloy and allows for stacking of different layers of chips on top of the first one, without destroying the pre-existing bonds. This paves the way for vertical integration technologies. Results of the characterization of the first pixel modules interconnected through SLID as well as of one sample irradiated to $2\cdot10^{15}$\,\neqcm{} are discussed. Additionally, the etching of ICV into the front-end wafers was started. ICVs will be used to route the signals vertically through the front-end chip, to newly created pads on the backside. In the EMFT approach the chip wafer is thinned to (50--60)\,$\mu$m.Comment: Proceedings to PSD

Application of a new interconnection technology for the ATLAS pixel upgrade at SLHC

We present an R&D activity aiming towards a new detector concept in the framework of the ATLAS pixel detector upgrade exploiting a vertical integration technology developed at the Fraunhofer Institute IZMMunich. The Solid-Liquid InterDiffusion (SLID) technique is investigated as an alternative to the bump-bonding process. We also investigate the extraction of the signals from the back of the read-out chip through Inter-Chip-Vias to achieve a higher fraction of active area with respect to the present ATLAS pixel module. We will present the layout and the first results obtained with a production of test-structures designed to investigate the SLID interconnection efficiency as a function of different parameters, i.e. the pixel size and pitch, as well as the planarity of the underlying layers

Characterisation of novel thin n-in-p planar pixel modules for the ATLAS Inner Tracker upgrade

In view of the high luminosity phase of the LHC (HL-LHC) to start operation around 2026, a major upgrade of the tracker system for the ATLAS experiment is in preparation. The expected neutron equivalent fluence of up to 2.4 * 1e16 1 MeV neq./cm2 at the innermost layer of the pixel detector poses the most severe challenge. Thanks to their low material budget and high charge collection efficiency after irradiation, modules made of thin planar pixel sensors are promising candidates to instrument these layers. To optimise the sensor layout for the decreased pixel cell size of 50 * 50 {\mu}m2, TCAD device simulations are being performed to investigate the charge collection efficiency before and after irradiation. In addition, sensors of 100-150 {\mu}m thickness, interconnected to FE-I4 read-out chips featuring the previous generation pixel cell size of 50 * 250 {\mu}m2, are characterised with testbeams at the CERN-SPS and DESY facilities. The performance of sensors with various designs, irradiated up to a fluence of 1 * 1e16 neq./cm2, is compared in terms of charge collection and hit efficiency. A replacement of the two innermost pixel layers is foreseen during the lifetime of HL-LHC. The replacement will require several months of intervention, during which the remaining detector modules cannot be cooled. They are kept at room temperature, thus inducing an annealing. The performance of irradiated modules will be investigated with testbeam campaigns and the method of accelerated annealing at higher temperatures.Comment: 11 pages, 10 figures, proceedings of the PSD Conference 201